• Energy Research

AbstractOne of the most limiting factors in the record conversion efficiency of amorphous/crystalline silicon heterojunction solar cells is the not impressive fill factor value. In this work, with the aid of a numerical model, the ways to enhance the cell fill factor up to 85% are investigated in detail, considering the properties of conventional amorphous‐doped films, wider Energy gap layers, and transparent conductive oxide films. The band alignment among the various materials composing the heterojunction is the key to high efficiency but becomes an issue for the solar cell fill factor, if not well addressed. One of the most interesting outcomes of this work is the evidence of hidden barriers arising between the transparent conductive oxide and both selective contacts, due to the mismatch between their work functions. The measurement of light current‐voltage characteristics performed at low temperature is proposed as a way to identify the presence of these barriers in efficient solar cells that do not possess high fill factor values. Experimental J‐V characteristics compared with numerical simulations demonstrated that the sometimes neglected cell base contact needs instead a more careful consideration. To this aim, a model to predict the presence of a hidden barrier at the base contact that limits the cell fill factor is proposed.

Today to achieve high efficiency solar cells, the crystalline silicon (c-Si) heterojunction (HJ) represents one of the best available options. The key factor of its success is the high open circuit voltage (Voc) achievable, because of the excellent surface passivation due to the intrinsic amorphous silicon (a-Si:H) layers. During cells manufacturing, the a-Si:H film deposition is simultaneously performed on both c-Si wafer sides, and consequently also on the edges of the wafer. However, the wafer edges could result non-passivated in many cases such as the so-called shingling manufacturing route. Moreover, at laboratory level it is quite common to manufacture small area cells from larger wafers. When a silicon edge is left uncovered by cutting, a recombining region is created due to the silicon non-passivated surface. This, in principle, leads to a reduction in the Voc of the cell. Nevertheless, this is not experienced for large area cells cut in half but it is commonly observed that cutting silicon HJ edges results in a lowering in Voc. In this work we have analyzed the correlation between the Voc, the cell area and the recombining surface introduced by cutting the cell into a smaller one. We have monitored the Voc as a function of the cell area during time, and we also have investigated the possibility of a re-passivation of the cell edges by depositing a thick a-Si:H layer after masking the sun exposed cell surface, exploring different deposition conditions to avoid re-annealing of the existing a-Si:H layers.

AbstractSilicon heterojunction solar cells have largely demonstrated their suitability to reach high efficiencies. We have here focused on p-type c-Si wafers as absorber, considering that they share more than 90% of the solar cell market. To overcome some of the issues encountered in the conventional (n)a-Si:H/(p)c-Si configuration, we have implemented a mixed phase n-type silicon oxide (n-SiOx) emitter in order to gain from the wider bandgap and lower activation energy of this material with respect to (n)a-Si:H. The workfunction of the transparent conductive oxide layer (WTCO) plays also a key role, as it may induce an unfavourable band bending at the interface with the emitter. We have here focused on AZO, a promising alternative to ITO. Different layers with varying WTCO were prepared, by changing relevant deposition parameters, and were tested into solar cells. The experimental results have been explained with the aid of numerical simulations. Finally, for the n-SiOx/(p)c-Si heterojunction with optimized WTCO a potential conversion efficiency well over 23% has been estimated.

Abstract Earth abundant Cu2ZnSnS4 (CZTS) semiconductor can find a promising application as wide-bandgap top cell absorber in CZTS/Silicon tandem devices. The coupling between the top and the bottom cells in a monolithic device requires the development of a proper intermediate connection able to ensure: (i) high transparency in the infrared region (ii) good electric contacts and (iii) good chemical stability under thermal treatments used for the CZTS growth, in order to prevent elements interdiffusion and silicon degradation. To this purpose, some multilayered structures based on MoS2 and different Transparent Conductive Oxides (TCOs) were tested as intermediate connection in CZTS/Silicon tandem devices. The first working monolithic tandem cell, with open circuit voltage of about 950 mV and an efficiency of 3.5%, was obtained using a MoS2/FTO/ZnO trilayer structure as intermediate contact between the top and the bottom cells. Some limiting factors of this device were addressed and investigated in order to increase the tandem cell efficiency.

The Laser grooved buried contact silicon solar cell (LGBC) process employed by Narec currently produces LGBC cells designed to operate at concentrations ranging from 1–100 suns and has demonstrated efficiencies at 50X of over 19% and at 100X of over 18.2% using 300 μm CZ silicon[1] wafers. As part of the LAB2LINE[1], APOLLON[2] and ASPIS[3] projects funded under the European Commission Framework Programs (FP6 and FP7) we have made improvements to the LGBC process to improve efficiency or make the cell technology more suitable for industrial CPV receiver manufacturing processes. We describe a process which hybridizes LGBC and more standard screen printing technologies which yields at least a 6% relative improvement at concentration when using more readily available 200 μm thick CZ wafers. We describe a pioneering front dicing technique (FDT). The FDT process is important in small cells where edge recombination effects are detrimental to the performance. We show that by using this new technique we can produce cells that perform better at concentration and improve the positioning of the front contact of the cell. We also describe a busbar technology that uses laser processing and electroless chemical plating to allow not only soldering to the front contact of the cell but also wire bonding. The advances in research and development of LGBC cells leading to improved cell performance may provide significant reductions in levilised cost of energy (LCOE) for low to medium CPV systems.

AbstractCrystalline silicon‐based heterojunction (HJ) solar cells are becoming the best choice for manufacturing companies, because of the low temperature processes useful for very thin silicon wafers and the possibility to easily achieve cells efficiencies higher than 22% on n‐type silicon wafers. However, the maximum cell efficiency is still limited by the typical Fill Factor (FF) value of 82%. This issue is due to several factors, some of which are sometimes underestimated, like the base contact. Indeed, a potential mismatch between the work functions of the transparent conductive oxide and the base doped layer can give rise to a small barrier against electrons collection, which is not easy to recognize when the cell FF overcomes 80%. Also a low doping efficiency of the p‐type amorphous layer at the emitter side can negatively affect the FF. In this case, even if high efficiency cells are produced, their full potential is still unexploited. Thus, both selective contacts of the cell, even if apparently optimized to achieve very good results, can hide problems that limit the final cell FF and efficiency. In a previous work, an experimental method and a model to individuate hidden barriers at the base contact on n‐type crystalline silicon‐based HJs have been provided. In this paper, that model is applied to experimental data obtained from the characterization of both commercial and laboratory level HJ solar cells. Moreover, an easy method to recognize the presence of a barrier to the charge transport at the emitter side of the cell is illustrated.

Abstract In this paper is investigated an heterostructure based on p-doped textured wafers of crystalline silicon on which we deposited a buffer of lightly n-doped amorphous layer and an n + -doped layer. In particular, the effect of n-doping of amorphous silicon on the photovoltaic characteristics of the heterojunctions is studied. Starting from an extensive analysis of the doping efficiency of phosphine in microdoped materials we fabricated several devices varying the PH 3 /SiH 4 ratio in the PECVD system. An optimum value of this ratio is found at 10 −2 , corresponding to the maximum of the photovoltaic efficiency of 11.5%.

Perovskite technology has been advancing at unprecedented levels over the past years, with efficiencies reaching up to 26.1%. State-of-the-art results are obtained on a very small area scale (<0.1 cm 2 ), by adopting high materials wasting processes not compatible with industry and with market exploitation. Silicon is a well-established technology and one of the advantages of perovskite is its ability to pair with silicon forming a tandem device that extracts charges reducing transmission and thermalization losses. In this work, we focused on finding a strategy to fabricate 15.2 × 15.2 cm 2 perovskite modules by using blade/slot-die coating and avoiding any spin coating deposition. Furthermore, we optimized the indium tin oxide top electrode deposition by adjusting the sputtering process and buffer layer deposition; finally, we focused on light management by applying an antireflective coating. We obtained a semitransparent and a tandem silicon–perovskite module in a four-terminal (4T) configuration over 225 cm 2 (4T configuration) with 13.18% and 20.91% efficiency, respectively, passing International Summit on Organic PV Stability ISOS-L1 (under continuous light soaking in the air) test with a remarkable T 80 of 1459 h.