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SINANO

INSTITUT SINANO ASSOCIATION
Country: France
13 Projects, page 1 of 3
  • Funder: European Commission Project Code: 257375
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  • Funder: European Commission Project Code: 101092562
    Overall Budget: 2,997,780 EURFunder Contribution: 2,997,780 EUR

    The objective of this project is to support the EC in defining topics and measures to strengthen the position of Europe in the global value chain of semiconductor and semiconductor-based photonics, by focussed cooperation initiatives with other leading semiconductor regions. The starting point will be the identification of European and non-EU industrial strengths and gaps in the field of semiconductors with the support of industrial organization, while emerging technologies will be explored through the participation of leading research centres. The project will profit of already existing international cooperation initiatives among regions, like ITRS2 and IRDS, to define possible cooperation areas and modes. ICOS will also benefit from a project leader who has matured extensive experience in the coordination of 6 EU projects in the field of semiconductors. As a result, the project will provide advice to the EC on joint actions to be implemented with leading semiconductor countries to reinforce the European position, supported by an in depth analysis of risks vs. expected benefits. The actions may include exchange of research results, joint research activities, researchers’ exchange programs and joint definition of standards. A proper dissemination of results will take place through joint events and participation to main conferences of the sector, both European and international.

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  • Funder: European Commission Project Code: 101131822
    Overall Budget: 14,457,500 EURFunder Contribution: 14,457,500 EUR

    InfraChip is to implement the first integrated, distributed research infrastructure as a wider European research platform for the sustainable development of next-generation and future semiconductor chips. InfraChip will mobilise a critical mass of people, expert knowledge and technology blocks, and capital investment on state-of-the-art equipment to address the EU’s twin digital and green transition and ensure Europe’s capacity to innovate at the early to medium readiness levels. Building on existing RI communities, namely ASCENT+ on Nanoelectronics, EMERGE on Sustainable Flexible Electronics and EnABLES on Powering the Internet of Things (IoT), the InfraChip initiative will advance the state-of-the-art by supporting comprehensive user projects for multi-and-trans-disciplinary path-finding research on sustainable Information and Communications Technologies (ICT)driven by the secure edge. These challenge-driven projects will target the introduction of new materials, proof-of-concept and feasibility studies of new manufacturing processes or disruptive technologies. To accelerate the translation of results from the lab to the fab, InfraChip will channel project activities to Testing and Experimentation Facilities, European Digital Innovation Hubs and Pilot Lines. InfraChip will also develop talent and train a skilled workforce through its Research Accelerator Programme and additional hands-on courses and education resources to support early career innovators and the high-value semiconductor industry. As a whole, InfraChip will significantly contribute to research and innovation capacity within the objectives of the European Chips Act.

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  • Funder: European Commission Project Code: 101182279
    Overall Budget: 433,622,016 EURFunder Contribution: 216,811,008 EUR

    The FAMES Pilot Line consortium, led by CEA-Leti, is composed of 4 Hosting Sites (CEA-Leti, Tyndall, VTT and SAL). Consortium also includes RTOs such as Imec, Fraunhofer, Cezamat WUT, Universities with UC Louvain, Grenoble INP and Universidad of Granada, and the association SiNano. With the goal of transferring results to the EU semiconductor industry, the FAMES Pilot Line will develop advanced technologies offering 2 generations of FD-SOI at 10nm and 7nm nodes, addressing the surging demand for FD-SOI technology. This FD-SOI platform will be enhanced with integrated non-volatile memory, radiofrequency components, 3D options, and magnetic inductances to improve power management. These advancements will facilitate the development of innovative chip designs, offering significant performance improvements and efficiency gains. This will lead to next-generation products, including microcontrollers, MPUs, 5G/6G chips, imagers, sensors, secure chips, quantum chips, and edge AI chips. The FAMES Pilot Line will offer users an open access framework for R&D services and prototyping. Access will be available through two mechanism: a reactive one that will entail the consortium to evaluate the feasibility of Users spontaneous requests and a proactive one featuring an annual open call. Forty industry leaders, including Nokia, Ericsson, Infineon, Bosch, and STMicroelectronics, have pledged their support through signed letters, intending to leverage the FAMES Pilot Line capacity for technology evaluation and integration into their products. Linked to the Design Platform and Competence Centers, the FAMES Pilot Line will establish a world-class environment dedicated to skill enhancement through specialized training and summer schools. It will champion sustainable practices within cleanrooms and process development. With its expertise and knowledge, the consortium is poised to effectively launch the FAMES Pilot Line and will transfer results to Industry.

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  • Funder: European Commission Project Code: 101161251
    Overall Budget: 4,000,000 EURFunder Contribution: 4,000,000 EUR

    DESIRE4EU aims at proving the concept of a radically new sustainable approach to produce, use and recycle electronic printed circuit boards (PCB) that combine technical performance, economic and ecological efficiency throughout their life cycle. The project’s vision is of sustainable, circular PCB manufactured in Europe using bio-based and biodegradable materials. It disrupts current paradigms and significantly reduces harmful waste, enabling fast and ecological copper recovery, above 70wt% of PCB ultimate waste elimination and 1-2% electronics sector CO2 emissions decrease by combining material science, green chemistry, electronics, environmental microbiology, Life Cycle and Value Chain Assessments. Our holistic approach considers boards as a complete system and develops a proof of concept and guidelines for exemplary, fully circular sustainable electronics solutions contributing to European leadership, resilience, and independence. We envision a world-first by 2030: industrially credible, compliant, bio-based, rigid boards, with an innovative and environmentally friendly recycling process for critical metals. DESIRE4EU has 4 SMART specific objectives: (1) The complete assembly of a technology compliant bio-based multilayer PCB, (2) An environmentally friendly and time-efficient bioleaching process, (3) A circular by design approach, materialized by guidelines for further uptake, (4) An advanced, cost-effective but large proof of concept attracting 2000 – 5000 students, responsible citizens and industries, from learners to prosumers. The consortium gathers 8 academic and private partners from 5 European countries, including 2 SMEs and 1 start-up. DESIRE4EU is managed by GINP, represented by Full Professor P. Xavier, who has extensive scientific and management experience. The partners expect at least 7 Open Access articles and 3 patents for this disruptive technology to be exploited in the field of class 2 rigid boards, with a potential market of €436 million.

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