This proposal describes the third core project of the Graphene Flagship. It forms the fourth phase of the FET flagship and is characterized by a continued transition towards higher technology readiness levels, without jeopardizing our strong commitment to fundamental research. Compared to the second core project, this phase includes a substantial increase in the market-motivated technological spearhead projects, which account for about 30% of the overall budget. The broader fundamental and applied research themes are pursued by 15 work packages and supported by four work packages on innovation, industrialization, dissemination and management. The consortium that is involved in this project includes over 150 academic and industrial partners in over 20 European countries.

The COSMICC consortium gathers key industrial and research partners with world-leading positions in the fields of Silicon photonics, CMOS electronics, Printed Circuit Board-Packaging, Optical transceivers and Data-Centers around a strong vision: mass commercialization of Si-photonics-based transceivers is possible starting in 2019 by enhancing the existing photonic integration platform of one of the partners, STMicroelectronics. COSMICC will develop optical transceivers that will be packaged on-board. Combining CMOS electronics and Si-photonics with innovative-high-throughput fiber-attachment techniques, the developed solutions are scalable to meet the future data-transmission requirements in data-centers and Super computing systems. With performances improved by an order of magnitude as compared with current VCSELs transceivers, COSMICC developed technology will answer tremendous market needs with a target cost per bit that the traditional WDM transceivers cannot meet. The early setting up of a new value chain will enable exploitation of the developed technologies. In a first high reward step-modification of the fabrication platform, COSMICC consortium will achieve mid-board optical transceivers in the [2Tbit/s -2pJ/bit- 0.2€ per Gbit/s]-class with ~200Gbit/s per fiber: the introduction of one process brick (SiN layer) in the photonic process will enable low-cost packaging techniques (up to 2x12 fiber channels) and practical coarse WDM implementation (4 wavelengths with no temperature-control requirements). The built demonstrators will be tested in lab and field environments. In compliancy with the enhanced-fabrication platform, lasers will be developed by heterogeneous integration of III-V material, targeting improved temperature behavior, and doubled-bit-rate payback. A second step-modification of the fabrication platform will consist in evaluating a disruptive process that enables SiGe layers with tunable Si-composition for achieving micrometer-scale devices.

This proposal describes the third stage of the EC-funded part of the Graphene Flagship. It builds upon the results achieved in the ramp-up phase (2013 - 2016) and the first core project (2016 - 2018), and covers the period April 2018 - March 2020. The progress of the flagship follows the general plans set out in the Framework Partnership Agreement, and the second core project represents an additional step towards higher technology and manufacturing readiness levels. The Flagship is built upon the concept of value chains, one of which is along the axis of materials-components-systems; the ramp-up phase placed substantial resources on the development of materials production technologies, the first core project moved to emphasise components, and the second core project will move further towards integrating components in larger systems. This evolution is manifested, e.g., in the introduction of six market-motivated spearhead projects during the Core 2 project.