Currently world-wide efforts are concentrated along research and industrial developments of quantum computers based on large cryogenic or vacuum installations, having attracted massive investments. Nevertheless, an integrable portable quantum processor, operating at ambient conditions, would bring massive benefits for developing quantum algorithms, software and novel applications, widely spreading the quantum technologies. The research on the realisation of integrable devices is also subject to several research activities within the Quantum Flagship. However, these concepts represent chief technical challenges in terms of scalability of qubit gates that are still limited to operation of only a very few qubits and requiring temperatures of a few milliKelvin. An integrable, small to medium scale and portable quantum processor, operating at ambient conditions, represents thus chief technical challenges in terms of developing of concepts and technologies. Photonic technologies represent the major development trends towards integrable devices, offering the potential of operating a large number of qubits, still the current photonic technologies are probabilistic. The recent breakthrough results, established within this consortium, discovered possibility of near-deterministic generation of solid-state-qubits, NV centres in diamond, placed at a distance of about 10-40 nm allowing for high fidelity two-qubit gates based on magnetic dipole-dipole coupling. The method of electrical readout of the spin, also discovered last year by the consortium members, allows for individual spin qubit readout, dealing with the major constrain of the diamond quantum hardware scalability. MAESTRO proposes a novel approach to develop solid-state qubit architectures for working at ambient conditions, which become available based on the aforementioned ground-breaking work, that will be used as a basis for scaling up, providing a compelling path towards industrially interesting medium scale quantum systems. The central aim of the proposal is to tackle the bottle neck issues of our technology for diamond processor hardware scalability, e.g., the deterministic engineering and fabrication of NV qubits with a high fabrication yield that will allow then to scale our technology to industrially relevant processes. Together with the selective electric qubit readout, applied to an entangled qubit network in a nanoscale device, MAESTRO will provide a quantum processor platform that can be further developed, in future, towards marketable industrial applications.

STREAM is a 4-year multi-site training network that aims at career development of Early Stage Researchers (ESRs) on scientific design, construction manufacturing and of advanced radiation instrumentation. STREAM targets the development of innovative radiation-hard, smart CMOS sensor technologies for scientific and industrial applications. The platform technology developed within the project will be tested in the demanding conditions posed by the CERN LHC detectors’ environment as well as European industry leaders in field of CMOS imaging, electron microscopy and radiation sensors. This leveraging factor will allow to fine-tune the technology to meet the requirements of industrial application cases on demand such as electron microscopy and medical X-ray imaging, as well as pathway towards novel application fields such as satellite environments, industrial X-ray systems and near-infrared imaging. The project will train a new generation of creative, entrepreneurial and innovative early-stage researchers and widen their academic career and employment opportunities. The STREAM consortium is composed of 10 research organisations and 5 industrial partners; the network will provide training to 17 ESRs. STREAM structures the research and training in four scientific work-packages which span the whole value-chain from research to application: CMOS Technologies Assessment, Smart Sensor Design and Layout, Validation and Qualification, Technology Integration, and Valorization.

Over the last decade, development of Smart Systems Integration (SSI) has demonstrated tremendous benefits in terms of enabling new functionalities of diverse products contributing to enormous economic potential with annual efforts in Europe estimated at approx.10 b€. There is significant opportunity for innovative SME’s to further exploit SSI as they are ideally placed to commercialise and drive the whole product development cycle, effectively bridging the “valley of death”. Europe is in a strong position to champion its’ established RTO’s competitive research, development and production facilities and to be a World leader in transitioning product development in SSI from prototyping to manufacturing, with particular focus in the low volume high value chain domain. SMARTER-SI has a unique opportunity to capitalise on Europe’s research excellence in SSI, leverage expertise of SME’s and RTO’s and drive impact through commercial exploitation. Inspired by the Strategic Research Agenda of EPoSS, SMARTER-SI aims to develop a RTO Community Foundry Model (CFM) that will accelerate a wider deployment of SSI with greater access to design, manufacturing capabilities for prototyping, early validation and first production for SME’s to exploit in niche markets. A strategic objective is to lower entry barriers using the cooperative approach of utilising existing process steps/building blocks available at partner RTOs. This in turn will advance innovative products for SMEs in Europe. The system approach will enable these companies to reach for a higher profit margin than currently achievable with components sales. SMARTER-SI will thus facilitate a greater level of innovation and know-how that will reside within Europe and will be difficult to replicate by competitors in other regions for the manufacture and production of similar products. SMARTER-SI is designed to be a test bed to realise 10 Application Experiments through the CFM that will trigger a bigger action, e.g. in ECSEL.