GENESIS, backed by Horizon Europe, aims to make semiconductor manufacturing sustainable, aligning with the European Green Deal, by minimizing environmental impact with eco-friendly innovations. [Objectives] GENESIS aims to replace harmful materials with safer options, improve waste management, and enhance the use and recyclability of scarce materials. [Innovations] GENESIS introduces innovations in three key areas: • Innovative materials: PFAS-free polymer and eco-friendly gas alternatives complying with EU regulations. • Waste & emissions monitoring: Cutting-edge sensors detect hazardous substances for efficient aqueous and gas waste elimination, reducing environmental and health risks. • Scarce material management: New integration technologies optimize material usage and initiate recycling of scarce materials like Gallium, Niobium, and silicon carbide. [Methodology] GENESIS employs four technical work packages to research sustainable material substitution, emission reduction, and resource management. This modular approach promotes scalability and integration with existing processes, fostering a circular economy in the semiconductor sector. Supervised by management work packages, it quantifies environmental efficiency and engages in dissemination to promote European technological achievements [Outcomes] The project targets a 50% cut in hazardous materials, 30% decrease in emissions and waste, and improved scarce material recyclability, boosting EU semiconductor sustainability and global competitiveness. [Impact] GENESIS supports EU's tech sovereignty and resilience through accurate monitoring and sustainable practices. It positions Europe as a leader in sustainable semiconductor tech, setting new standards for impact-oriented communication and dissemination.

The WAKEMEUP project objective is to set-up a pilot line for advanced microcontrollers with embedded non-volatile memory, design and manufacturing for the prototyping of innovative applications for the smart mobility and smart society domains. The already defined microcontrollers with 40nm embedded flash technology will be consolidated to build a solid manufacturing platform. Additional developments will be performed for the integration of memory, power management, connectivity, hard security on the same chip. The project will also target the industrialization of the embedded Phase Change Memory (PCM) technology built on top of the FDSOI 28nm logic process pilot line. The development of the ePCM will be driven by the final application requirements as well as decreasing the power consumption. The alternative memory solutions will be also studied as they have different - and complementary - traits in such areas as read/write speed, power and energy consumption, retention and endurance, and device density and benchmarked with the ePCM and the conventional eFlash. Continued advances in materials, device physics, architectures and design could further reduce the energy consumption of these memories. To achieve this goal of generating high value added semiconductor circuits in Europe in a breakthrough leading edge technology the project will deploy all the necessary activities to bring a new technology to an early industrial maturity stage. These activities encompass such developments as: technology enhancements for various specific application requirements such as wide temperature range and reliability, high security requests, high flexibility…, design enablment allowing first time silicon success, prototyping demonstrator products in the different application areas. In the WAKEMEUP project, new devices and systems will be developed by the application partners in automotive and secure based on FD-SOI and embedded digital technology to answer specific applications needs.

PRODUCTIVE4.0 - AMBITIOUS PROJECT WITH A UNIQUE MAIN OBJECTIVE The main objective of Productive4.0 is to achieve improvement of digitising the European industry by electronics and ICT. Ultimately, the project aims at suitability for everyday application across all industrial sectors – up to TRL8. It addresses various industrial domains with one single approach of digitalisation. What makes the project unique is the holistic system approach of consistently focusing on the three main pillars: digital automation, supply chain networks and product lifecycle management, all of which interact and influence each other. This is part of the new concept of introducing seamless automation and network solutions as well as enhancing the transparency of data, their consistence and overall efficiency. Currently, such a complex project can only be realised in ECSEL. The consortium consists of 45% AENEAS, 30% ARTEMIS-IA, 25% EPOSS partners, thus bringing together all ECSEL communities. Representing over 100 partners from 19 EU and other associated countries, it is a European project, indeed. HANDS-ON SOLUTIONS FOR THE EUROPEAN DIGITAL INDUSTRY • Productive4.0 tackles technological and conceptual approaches in the field of Industry 4.0. The term comprises IIoT (Industrial Internet of Things), CPS (Cyber Physical Systems) and Automation. • The innovation project takes a step further towards hands-on solutions. In the process, practical reference implementations such as 3D printerfarms, customised production or self-learning robot systems will benefit in fields like service-oriented architecture (SOA), IOT components & infrastructures, process virtualisation or standardisation. These fields are addressed in the work packages WP1 through WP6. • In addition to furnishing the industry with tailor-made digital solutions, the Productive4.0 Framework will be provided. • Productive4.0 is a brain pool initiated to strengthen the international leadership of the European industry.

Europe is poised to play a pivotal role in the technological revolution, particularly in the field of edge AI, which promises sustainable growth, performance, and reliability. The NeAIxt project is a strategic initiative designed to foster European independence and control over edge AI technology, benefiting both companies and citizens. The project presents a golden opportunity for European SMEs to grow, network, and enhance skills, leveraging exposure to the global market. Research labs and RTOs will bridge the gap to the future by developing necessary technologies and competencies, while universities will cultivate and disseminate advanced skills required for this technological evolution. NeAIxt aims to solidify Europe's position in edge AI and eNVM technology by enhancing AI enablers, evolving eNVM for edge applications, and demonstrating AI capabilities at both chip and system levels. The project is committed to ensuring the safety and security of AI services, adhering to EU regulations. Key technical developments include the advancement of 18nm FD-SOI and next-generation embedded Phase Change Memory (ePCM). These innovations will lead to high-performance, secure microcontrollers with AI capabilities, offering low power consumption and high security for smart applications. The project will integrate advances in non-volatile memory technologies with cutting-edge MCU design to enable efficient in-memory computing. This synergy will deliver a fully European solution for reliable, safe, and independent edge AI applications. NeAIxt will address the entire edge AI value chain, from academia to industry, and from design to end-user applications, building on Europe's strong technological foundation. The project's outcomes will alleviate societal concerns about AI proliferation by ensuring compliance with European privacy standards, fostering AI adoption in various sectors.

The SeNaTe project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 12nm and 10nm technology nodes. The main objective is the demonstration of the 7nm IC technology integration in line with the industry needs and the ITRS roadmap on real devices in the Advanced Patterning Center at imec using innovative device architecture and comprising demonstration of a lithographic platform for EUV and immersion technology, advanced process and holistic metrology platforms, new materials and mask infrastructure. A lithography scanner will be developed based on EUV technology to achieve the 7nm module patterning specification. Metrology platforms need to be qualified for N7’s 1D, 2D and 3D geometries with the appropriate precision and accuracy. For the 7nm technology modules a large number of new materials will need to be introduced. The introduction of these new materials brings challenges for all involved processes and the related equipment set. Next to new deposition processes also the interaction of the involved materials with subsequent etch, clean and planarization steps will be studied. Major European stakeholders in EUV mask development will collaboratively work together on a number of key remaining EUV mask issues. The first two years of the project will be dedicated to find the best options for patterning, device performance, and integration. In the last year a full N7 integration with electrical measurements will be performed to enable the validation of the 7nm process options for a High Volume Manufacturing. The SeNaTe project relates to the ECSEL work program topic Process technologies – More Moore. It addresses and targets as set out in the MASP at the discovery of new Semiconductor Process, Equipment and Materials solutions for advanced CMOS processes that enable the nano-structuring of electronic devices with 7nm resolution in high-volume manufacturing and fast prototyping.