Intelligent Reliability 4.0 (iRel40) has the ultimate goal of improving reliability for electronic components and systems by reducing failure rates along the entire value chain. Trend for system integration, especially for heterogeneous integration, is miniaturization. Thus, reliability becomes an increasing challenge on device and system level and faces exceptional requirements for future complex applications. Applications require customer acceptance and satisfaction at acceptable cost. Reliability must be guaranteed when using systems in new and critical environments. In iRel40, 79 partners from 14 countries collaborate in 6 technical work packages along the value chain. WP1 focuses on specifications and requirements. WP2 and WP3 focus on modelling, simulation, materials and interfaces based on test vehicles. WP4 applies the test vehicle knowledge to industrial pilots related to production. WP5 applies the knowledge to testing. WP6 focuses on application use cases applying the industrial pilots. We assess and validate the iRel40 results. Reliable electronic components and systems are developed faster and new processes are transferred to production with higher speed. Crucial insight gained by Physics of Failure and AI methods will push overall quality levels and reliability. iRel40 results will strengthen production along the value chain and support sustainable success of Electronic Components and Systems investment in Europe. By collaboration between academy, industry and knowledge institutes on this challenging topic of reliability, the project secures more than 25.000 jobs in the 25 participating production and testing sites in Europe. The project supports new applications and reliable chips push applications in energy efficiency, e-mobility, autonomous driving and IoT. This unique project brings, for the first time ever, world-leading reliability experts and European manufacturing expertise together to generate a sustainable pan-European reliability community.

R-PODID (Reliable Powerdown for Industrial Drives) aims to develop an automated, cloudless, short-term fault-prediction for electric drives, power modules, and power devices, that can be integrated into power converters. Thereby, electrical and mechanical faults of machines and of the power converters driving them will become predictable within a limited prediction horizon of 12-24h. This will enable a power-saving shutdown of a larger number of production machines during idle times, because a looming failure during the next power-on cycle can be reliably foreseen. It will also enable reliable mitigation of dangerous faults in applications using modern power-devices like silicon-carbide (SiC) and III/V-semiconductor devices like gallium-nitride (GaN).

The demand for electrical energy increases at a steady pace worldwide due to the growing and emerging applications such as server/telecom farms, 5G base station, more-electric aircrafts, consumer electronics, robotics, and electric vehicles. The volume and efficiency of the power converters utilized in these systems play a critical role for the fulfillment of this growth. Higher efficiency translates into more capacity utilization and less cooling efforts, whereas low volume and weight usually reduces the cost of the electronic components. Both of these aspects heavily depend on the innovations on the power topologies, control algorithms, magnetics, thermal substrates, and particularly power semiconductor switches. The power converter topologies in the literature have been invented to overcome or mitigate the large reverse recovery and output charge of Si power devices, while magnetics are optimized for switching frequencies that are achievable with Si power devices. However, the maximum efficiency and power density of Si based converters have already reached to its theoretical limit through innovations on the control and converter topologies. Recently, the adoption of the wide band-gap semiconductors has escalated the expectations from power electronics significantly, and initiated the transformation of the power architecture through new topologies and control innovations, while bringing new challenges in the high frequency domain. This research proposal is intended to innovate, design, and implement a new front-end PFC converter switched at >400 kHz to achieve best in-class efficiency and power density with targets of more than 98.5% peak efficiency and 85W/in3 enclosed power density at 3.7kW output power. The know-how and framework will then be engineered to meet certain industrial specs of various applications including the pre-regulator stage of server/telecom supplies, on-board chargers, industrial drives.