The SeNaTe project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 12nm and 10nm technology nodes. The main objective is the demonstration of the 7nm IC technology integration in line with the industry needs and the ITRS roadmap on real devices in the Advanced Patterning Center at imec using innovative device architecture and comprising demonstration of a lithographic platform for EUV and immersion technology, advanced process and holistic metrology platforms, new materials and mask infrastructure. A lithography scanner will be developed based on EUV technology to achieve the 7nm module patterning specification. Metrology platforms need to be qualified for N7’s 1D, 2D and 3D geometries with the appropriate precision and accuracy. For the 7nm technology modules a large number of new materials will need to be introduced. The introduction of these new materials brings challenges for all involved processes and the related equipment set. Next to new deposition processes also the interaction of the involved materials with subsequent etch, clean and planarization steps will be studied. Major European stakeholders in EUV mask development will collaboratively work together on a number of key remaining EUV mask issues. The first two years of the project will be dedicated to find the best options for patterning, device performance, and integration. In the last year a full N7 integration with electrical measurements will be performed to enable the validation of the 7nm process options for a High Volume Manufacturing. The SeNaTe project relates to the ECSEL work program topic Process technologies – More Moore. It addresses and targets as set out in the MASP at the discovery of new Semiconductor Process, Equipment and Materials solutions for advanced CMOS processes that enable the nano-structuring of electronic devices with 7nm resolution in high-volume manufacturing and fast prototyping.

ALL2GaN will be the backbone for the European Power Electronics Industry by offering an EU-born smart GaN Integration Toolbox. The project will provide the base for applications with significantly increased material- and energy efficiency, thus meeting the global energy needs while keeping the CO2 footprint to the minimum. 46 partners from 12 European countries will collaborate on 8 major objectives along the entire vertical value chain of power and RF electronics. O1: Push the limits of industrial GaN devices and system-on-chip approaches for ≤ 100V O2: Leverage the full potential of innovative substrates for GaN O3: Achieve novel benchmark solutions for lateral GaN devices and integrated circuits ≥ 650V O4: Reach best technical and cost performance of RF GaN on Si with novel integration concepts O5: Break the packaging limits by application driven integrated solutions of high performance GaN products O6: Advance the methods to evaluate and optimize reliability and robustness of GaN components, modules, and systems for shortest time-to-market and maximum product availability at the end user O7: Demonstrate highest affordable performance for greener power electronics and RF applications O8: Road-mapping for the future GaN technology development and applications to support long-term exploitation/business cases and European leadership beyond ALL2GaN. The collaboration in ALL2GaN is based on a work package structure covering activities on novel power- and RF-GaN technologies for various voltage classes, latest packaging technologies, research on reliability and demonstration in 11 Use Cases. With ambitious goals and a clear vision, ALL2GaN will unleash the energy saving and material efficiency potential of GaN semiconductors for a broad field of applications, thus being in line with the major challenges outlined in the ECS-SRIA. ALL2GaN technology will directly contribute to energy saving and cutting-edge green technology innovation as…Every Watt counts!

In line with industry needs, Moore’s law, scaling in ITRS 2013, and ECSEL JU MASP 2017, the main objective of the TAPES3 project is to discover, develop and demonstrate lithographic, metrology, EUV mask technology, devices and process modules enabling 3nm node technology. This is planned with available EUV/NA 0.33 scanners, and with system design and integration of a new hyper NA EUV lithography tool to enable more single exposure patterning at 3nm to create complex integrated circuits. Process steps for 3D devices as alternative to the conventional FINFet will be explored for application in the 3nm node. The impact of the application of these so called 3D devices on circuit topology and logic design will be explored. During the development, specific challenges in metrology for the characterization of 3D devices will be assessed and metrology tools will be newly developed. The result will be demonstrated in the imec pilot line. The TAPES3 project relates to the ECSEL work program topic Equipment, Material and Manufacturing. It addresses and targets, as set out in MASP, the grand Challange of "More Moore Equipment and Materials for sub 10nm technologies" by exploring the requirements and solutions for the 3nm node. The project touches the core of the continuation of Moore’s law. Moreover, the cost aware development process will support the involved companies, and will place them in a preferred position over their worldwide competition. Through their worldwide affiliations, the impact of the TAPES3 project will be felt outside Europe in America and Asia Pacific semiconductor centers and is expected to benefit the European economy a lot by supporting its semiconductor equipment and metrology sectors with innovations, exports and employment.

The objective of POSITION-II is to bring innovation in the development and production of smart catheters by the introduction of open technology platforms for miniaturization, AD conversion at the tip, ultra-sound MEMS devices and encapsulation. Open technology platforms will generate the production volume that will enable sustainable innovation. The availability of open technology platforms will result in new instruments that have a better performance, new sensing and imaging capabilities, while the scale of volume will result in lower manufacturing costs. The production of the “brains” of these smart catheters will take place in Europe, with many European partners contributing essential technologies. The POSITION-II project will consolidate Europe’s premier position as manufacturer of cath lab infrastructure since these new smart catheters will be seamlessly integrated in the cath lab hardware and software platforms. By combining the different sensing and imaging data a more intuitive cath lab experience will be achieved. Looking forward, POSITION-II prepares the European electronics industry for the next revolution in healthcare, bioelectronics implants. Bioelectronics implants are expected to replace a considerable fraction of traditional medicine by direct stimulation of nerves. The miniaturization and soft encapsulation platforms developed in POSITION-II will be the ideal technology frame work for the manufacturing of these bioelectronics implants. The technology platforms developed in POSITION-II are demonstrated by five challenging product demonstrators covering FRR, IVUS, ICE, EP and cell therapy as well as a bioelectronics implant to treat cluster headache.