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Country: France

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9 Projects, page 1 of 2
  • Funder: French National Research Agency (ANR) Project Code: ANR-05-CIGC-0001
    Funder Contribution: 270,024 EUR
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  • Funder: European Commission Project Code: 277481
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  • Funder: French National Research Agency (ANR) Project Code: ANR-11-INSE-0012
    Funder Contribution: 810,264 EUR

    For the last 20 years, the complexity and requirements of communication and video standards have been increasing in an exponential manner. In the meantime, embedded system designers have witnessed the end of single processor platforms, and the generalization of so-called heterogeneous multi-core hardware architectures. Implementing complex and demanding applications on such complex platforms have already proven to be a daunting task. In that context, there is a growing interest in adaptive/reconfigurable platforms that can dynamically adapt themselves to support or provide better performance for the application at hand. In that case, the adaptation consists in mapping and scheduling processing units at run-time to enable software components re-use in time and space. Although proofs of concept of auto-adaptive multi-processors’ architectures were proposed, there is currently no complete design flow nor efficient approaches to deal with such architectures. A possible answer is to follow a model based approach, where both the hardware platform and the target application are abstracted through models. These models are used to capture a given domain-specific knowledge into a formal abstract representation. Models of Computations (Kahn Process Network, Synchronous Dataflow, etc.) specify the behavior of a system and are a perfect example of such an abstraction. Similarly, platform models which abstract the hardware components of a system (processing resources, communication, etc) are also a common abstraction for embedded platform designers. However, and in spite of some early work done in this direction, there is currently still no modeling approach taking run-time adaptation into consideration (from both a hardware and software point of view). As a consequence, the goal of the COMPA project is to propose generic models for adaptive multi-processors embedded systems. The project addresses several issues related this challenge: • We propose to rely on a target independent description of the application, and we will particularly focus on data flow Model of Computations (MoC). For that purpose, we will use the CAL language, developed in the Ptolemy project (Berkeley). And we will extend it with constructs for efficient modeling of multi-dimensional dataflow networks. • To offer additional opportunities for optimizing the application implementation, we propose to develop a static analysis toolbox for detecting underlying MoCs used in a given CAL description. This analysis will be coupled to optimizing transformations on CAL models. • We will specify and develop a “Runtime Execution Engine” which will be in charge of the execution of the CAL network on the platform. Providing runtime execution and reconfiguration services implies solving many problems including task-mapping, scheduling, etc. These problems themselves will take advantage of knowledge of the target architecture but also from meta data embedded in the CAL network description . All these contributions will be integrated in an open source software suite and a set of “runtime manager” software components will be developed for a multi-core FPGA based hardware demonstrator. A validation of the proposed models and modeling approaches on real-world multimedia applications is also part of the project goals.

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  • Funder: European Commission Project Code: 288038
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  • Funder: European Commission Project Code: 249013
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