
CAPS entreprise
CAPS entreprise
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9 Projects, page 1 of 2
assignment_turned_in ProjectFrom 2006Partners:Laboratoire d'Ecologie, Systématique et Evolution, CAPS entreprise, BULL SAS, UNIVERSITE DE VERSAILLES - SAINT-QUENTIN - EN - YVELINES, INSTITUT TELECOM +2 partnersLaboratoire d'Ecologie, Systématique et Evolution,CAPS entreprise,BULL SAS,UNIVERSITE DE VERSAILLES - SAINT-QUENTIN - EN - YVELINES,INSTITUT TELECOM,INSTITUT NATIONAL DE RECHERCHE EN INFORMATIQUE ET EN AUTOMATIQUE - (INRIA Siège),Institut de FranceFunder: French National Research Agency (ANR) Project Code: ANR-05-CIGC-0001Funder Contribution: 270,024 EURmore_vert assignment_turned_in Project2011 - 2013Partners:UW, University of Stuttgart, University of Edinburgh, TOTAL, CAPS entrepriseUW,University of Stuttgart,University of Edinburgh,TOTAL,CAPS entrepriseFunder: European Commission Project Code: 277481more_vert assignment_turned_in ProjectFrom 2011Partners:TI, INSTITUT NATIONAL DES SCIENCES APPLIQUEES - INSA DE RENNES, TI, UNIVERSITE DE BRETAGNE SUD, UNIVERSITE DE RENNES I +2 partnersTI,INSTITUT NATIONAL DES SCIENCES APPLIQUEES - INSA DE RENNES,TI,UNIVERSITE DE BRETAGNE SUD,UNIVERSITE DE RENNES I,CAPS entreprise,MODAE TECHNOLOGIESFunder: French National Research Agency (ANR) Project Code: ANR-11-INSE-0012Funder Contribution: 810,264 EURFor the last 20 years, the complexity and requirements of communication and video standards have been increasing in an exponential manner. In the meantime, embedded system designers have witnessed the end of single processor platforms, and the generalization of so-called heterogeneous multi-core hardware architectures. Implementing complex and demanding applications on such complex platforms have already proven to be a daunting task. In that context, there is a growing interest in adaptive/reconfigurable platforms that can dynamically adapt themselves to support or provide better performance for the application at hand. In that case, the adaptation consists in mapping and scheduling processing units at run-time to enable software components re-use in time and space. Although proofs of concept of auto-adaptive multi-processors’ architectures were proposed, there is currently no complete design flow nor efficient approaches to deal with such architectures. A possible answer is to follow a model based approach, where both the hardware platform and the target application are abstracted through models. These models are used to capture a given domain-specific knowledge into a formal abstract representation. Models of Computations (Kahn Process Network, Synchronous Dataflow, etc.) specify the behavior of a system and are a perfect example of such an abstraction. Similarly, platform models which abstract the hardware components of a system (processing resources, communication, etc) are also a common abstraction for embedded platform designers. However, and in spite of some early work done in this direction, there is currently still no modeling approach taking run-time adaptation into consideration (from both a hardware and software point of view). As a consequence, the goal of the COMPA project is to propose generic models for adaptive multi-processors embedded systems. The project addresses several issues related this challenge: • We propose to rely on a target independent description of the application, and we will particularly focus on data flow Model of Computations (MoC). For that purpose, we will use the CAL language, developed in the Ptolemy project (Berkeley). And we will extend it with constructs for efficient modeling of multi-dimensional dataflow networks. • To offer additional opportunities for optimizing the application implementation, we propose to develop a static analysis toolbox for detecting underlying MoCs used in a given CAL description. This analysis will be coupled to optimizing transformations on CAL models. • We will specify and develop a “Runtime Execution Engine” which will be in charge of the execution of the CAL network on the platform. Providing runtime execution and reconfiguration services implies solving many problems including task-mapping, scheduling, etc. These problems themselves will take advantage of knowledge of the target architecture but also from meta data embedded in the CAL network description . All these contributions will be integrated in an open source software suite and a set of “runtime manager” software components will be developed for a multi-core FPGA based hardware demonstrator. A validation of the proposed models and modeling approaches on real-world multimedia applications is also part of the project goals.
more_vert assignment_turned_in Project2011 - 2015Partners:UCG, BADW, University of Vienna, CAPS entreprise, UAB +1 partnersUCG,BADW,University of Vienna,CAPS entreprise,UAB,TUMFunder: European Commission Project Code: 288038more_vert assignment_turned_in Project2010 - 2014Partners:Universität Augsburg, University of Manchester, UCY, THALES, INRIA +6 partnersUniversität Augsburg,University of Manchester,UCY,THALES,INRIA,BSC,MSFT,UD,UNISI,CAPS entreprise,HPFunder: European Commission Project Code: 249013more_vert
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