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Rendering FPGAs to Multi-Core Embedded Computing

assignment_turned_inproject01 Jan 2010(Started)-31 Dec 2012(Ended)Closed

Funder: European CommissionProject code: 248976 Call for proposal: FP7-ICT-2009-4

Funded under: FP7 | SP1 | ICT

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Imperial , KIT , INESC ID , Coreworks - Projectos de Circuitos e Sistemas Electronicos S.A. , ACE , HONEYWELL INTERNATIONAL SRO , ACE , UPORTO , UPORTO , INESC ID , Coreworks - Projectos de Circuitos e Sistemas Electronicos S.A. , HONEYWELL INTERNATIONAL SRO , TU Delft

Data Management Plans

Start a new DMP in Argos

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