The FAMES Pilot Line consortium, led by CEA-Leti, is composed of 4 Hosting Sites (CEA-Leti, Tyndall, VTT and SAL). Consortium also includes RTOs such as Imec, Fraunhofer, Cezamat WUT, Universities with UC Louvain, Grenoble INP and Universidad of Granada, and the association SiNano. With the goal of transferring results to the EU semiconductor industry, the FAMES Pilot Line will develop advanced technologies offering 2 generations of FD-SOI at 10nm and 7nm nodes, addressing the surging demand for FD-SOI technology. This FD-SOI platform will be enhanced with integrated non-volatile memory, radiofrequency components, 3D options, and magnetic inductances to improve power management. These advancements will facilitate the development of innovative chip designs, offering significant performance improvements and efficiency gains. This will lead to next-generation products, including microcontrollers, MPUs, 5G/6G chips, imagers, sensors, secure chips, quantum chips, and edge AI chips. The FAMES Pilot Line will offer users an open access framework for R&D services and prototyping. Access will be available through two mechanism: a reactive one that will entail the consortium to evaluate the feasibility of Users spontaneous requests and a proactive one featuring an annual open call. Forty industry leaders, including Nokia, Ericsson, Infineon, Bosch, and STMicroelectronics, have pledged their support through signed letters, intending to leverage the FAMES Pilot Line capacity for technology evaluation and integration into their products. Linked to the Design Platform and Competence Centers, the FAMES Pilot Line will establish a world-class environment dedicated to skill enhancement through specialized training and summer schools. It will champion sustainable practices within cleanrooms and process development. With its expertise and knowledge, the consortium is poised to effectively launch the FAMES Pilot Line and will transfer results to Industry.