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COSMICC

CmOs Solutions for Mid-board Integrated transceivers with breakthrough Connectivity at ultra-low Cost
Funder: European CommissionProject code: 688516 Call for proposal: H2020-ICT-2015
Funded under: H2020 | RIA Overall Budget: 3,993,680 EURFunder Contribution: 3,736,900 EUR
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The COSMICC consortium gathers key industrial and research partners with world-leading positions in the fields of Silicon photonics, CMOS electronics, Printed Circuit Board-Packaging, Optical transceivers and Data-Centers around a strong vision: mass commercialization of Si-photonics-based transceivers is possible starting in 2019 by enhancing the existing photonic integration platform of one of the partners, STMicroelectronics. COSMICC will develop optical transceivers that will be packaged on-board. Combining CMOS electronics and Si-photonics with innovative-high-throughput fiber-attachment techniques, the developed solutions are scalable to meet the future data-transmission requirements in data-centers and Super computing systems. With performances improved by an order of magnitude as compared with current VCSELs transceivers, COSMICC developed technology will answer tremendous market needs with a target cost per bit that the traditional WDM transceivers cannot meet. The early setting up of a new value chain will enable exploitation of the developed technologies. In a first high reward step-modification of the fabrication platform, COSMICC consortium will achieve mid-board optical transceivers in the [2Tbit/s -2pJ/bit- 0.2€ per Gbit/s]-class with ~200Gbit/s per fiber: the introduction of one process brick (SiN layer) in the photonic process will enable low-cost packaging techniques (up to 2x12 fiber channels) and practical coarse WDM implementation (4 wavelengths with no temperature-control requirements). The built demonstrators will be tested in lab and field environments. In compliancy with the enhanced-fabrication platform, lasers will be developed by heterogeneous integration of III-V material, targeting improved temperature behavior, and doubled-bit-rate payback. A second step-modification of the fabrication platform will consist in evaluating a disruptive process that enables SiGe layers with tunable Si-composition for achieving micrometer-scale devices.

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