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WIPE

Wafer scale Integration of Photonics and Electronics
Funder: European CommissionProject code: 688572 Call for proposal: H2020-ICT-2015
Funded under: H2020 | RIA Overall Budget: 3,766,100 EURFunder Contribution: 3,063,000 EUR
Description

The WIPE project aims at developing hybrid electronic-photonic chips as a key enabling technology for data transmission purposes. It aims at bringing photonics to a new level by developing a concept that can be well industrialised. This sustains EU leadership in photonics, as is the ambition of the work program. A new wafer-scale technology will thus be developed for direct and intimate attachment of III-V Indium-Phosphide (InP) photonic integrated circuits (PICs) and BiCMOS electronic chips (ICs). The ICs contain the driver, receiver andcontrol electronics for the PIC and enable direct connection to polymer optical waveguides. This technology of ‘wafer scale heterogeneous integration’ enables high-performance and high-density photonic-electronic (photronic) modules are created having a lower energy consumption, lower packaging complexity and lower cost compared to modules using more traditional interconnection techniques like wire bonding and laser welding of fibre connections. Next to the new bonding technology, an integrated module design technology is developed for efficient co-design of hybrid photonic and electronic modules. A library consisting of photonic/electronic standard modules, is created leveraging the process design kits (PDKs) of the most important European foundries of photonic chips in combination with a powerful BiCMOS. These tools are of significantimportance to industry, since they offer photronic module designers a standardised approach that highly facilitates the module design for SMEs and affordable manufacturing by photonic and electronic foundries. The WIPE approach will be proven by showing the feasibility of a 400Gb/s transceiver for data centre application.

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