This paper is focused on reducing the Switched Reluctance Machines (SRMs) control sampling frequency in order to save processor real time resources, while keeping the stability and also the performance, in terms of average torque and torque ripple. Reducing the CPU cost either by implementing the control algorithm in a less performing CPU or more importantly reducing the percentage of the CPU demand is an attractive goal, especially for the electrical vehicle industry from where the SRM used in this research has been designed for. Once low sampling periods are applied in the current loop, a strong degradation in the averaged torque and torque ripple arises. Such problem degenerates with the speed, becoming unbearable at high speeds and eventually making the control unstable. In this paper two solutions are proposed. The first one, which is just software feasible, consists on anticipating the voltage supply in order to tackle the noncoincident calculated turn on and off angles and the actual sampling instants. The second solution, which must be implemented at a very low hardware level, uses a basic function to allow the process to emulate continuous control and therefore independent of the sampling instants. Finally, experimental results on a 8/6 SRM illustrate the validity of the novel strategies in terms of average torque performance and torque ripple minimization. (C) 2014 Elsevier Ltd. All rights reserved. Peer Reviewed