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image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Solar Energy Materia...arrow_drop_down
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
Solar Energy Materials and Solar Cells
Article . 2019 . Peer-reviewed
License: Elsevier TDM
Data sources: Crossref
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Detachment yield statistics for kerfless wafering using the porous silicon process

Authors: Rolf Brendel; C. Gemmel; Jan Hensen; Sarah Kajari-Schröder;

Detachment yield statistics for kerfless wafering using the porous silicon process

Abstract

Abstract The porous silicon (PSI) process is a wafering method to fabricate high quality kerfless crystalline Si wafers by epitaxial wafer growth on porous Si and subsequent detachment from a reusable substrate wafer. The process yield is a key parameter for the economic viability of the PSI process. We experimentally demonstrate the detachment of 59 out of 62 PSI wafers with a size of 10 × 10 cm2, and separation layer etch current densities of 105–120 mA/cm2 for electrochemically etching the porous Si, and for substrate wafers with a resistivity of 15.7–16.9 mΩcm. We discuss the statistics of how to deduce a detachment probability from this. From our experiments, we determine a detachment yield of at least 88% with an error probability of 5%. The demonstration of a 99% detachment yield with an error probability of 5% would require at least 300 successfully detached wafers with no failed detachment. Samples have a minority carrier density ranging from 1 to 1.7 ms before any external gettering, which demonstrates the high electric quality of the PSI wafers.

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