All modern hardware design makes use of hardware description languages like Verilog and VHDL. Thus these languages are presented very early in the curriculum, often in the first design course. Unfortunately, these languages often cause substantial confusion for students learning hardware design, particularly students that have experience writing programs in sequential languages like C and Java. To address this problem, we have defined a language called Abstract Verilog which is similar to Verilog, but which has well-defined, clean parallel execution semantics. Abstract Verilog has a somewhat restricted syntax in order to reduce the cognitive load for new students. However, almost any program that can be written in Verilog can be written in Abstract Verilog, where it is shorter and easier to understand. We have used Abstract Verilog successfully in both introductory and advanced design classes.