• Energy Research

Quasi-steady-state photoconductance is commonly used for measuring the effective lifetime of excess carriers in silicon wafers. A known artifact, unrelated to the sample's lifetime in eddy current based photoconductance measurements, is a strong increase in lifetime at low carrier densities. It is commonly observed in multicrystalline and cast-mono crystalline silicon. This artifact is often attributed to bulk defects changing their charge state and is referred to as trapping. In this work, we investigate an alternative interpretation for materials with crystallographic defects. In this interpretation, the trapping-like behavior is caused by local changes in the Fermi energy level at grain boundaries (compared to the bulk crystal), along with the substantial movement of the majority carriers’ quasi Fermi energy level during the photoconductance measurement. Using cast-mono wafers, we observe a variation in trapping signals and dark conductance that correlates with grain boundaries. We show that the trapping-like behavior in these regions can be explained by a change in electrostatic potential barrier heights at different illumination intensities and in the dark, impacting eddy currents. This should be considered when using eddy current based methods for characterization of multicrystalline and cast-mono silicon wafers.

In this article, we investigate the extent of lifetime degradation attributed to light- and elevated-temperature-induced degradation (LeTID) in p- type multicrystalline silicon wafers passivated with different configurations of hydrogenated silicon nitride (SiNx:H) and aluminum oxide (AlOx:H). We also demonstrate a significant difference between AlOx:H layers grown by atomic layer deposition (ALD) and plasma-enhanced chemical vapor deposition (PECVD) with respect to the extent of LeTID. When ALD AlOx:H is placed underneath a PECVD SiNx:H layer, as used in a passivated emitter and rear solar cell, a lower extent of LeTID is observed compared with the case when a single PECVD SiNx:H layer is used. On the other hand, the LeTID extent is significantly increased when an ALD AlOx:H is grown on top of the PECVD SiNx:H film. Remarkably, when a PECVD AlOx:H is used underneath the PECVD SiNx:H film, an increase in the LeTID extent is observed. Building on our current understanding of LeTID, we explain these results with the role of ALD AlOx:H in impeding the hydrogen diffusion from the dielectric stack into the c-Si bulk, while PECVD AlOx:H seems to act as an additional hydrogen source. These observations support the hypothesis that hydrogen is playing a key role in LeTID and provide solar cell manufacturers with a new method to reduce LeTID in their solar cells.

Abstract Illuminated solar cells are susceptible to various degradation mechanisms that can act to reduce the total energy yield when deployed. One potentially severe form is an increase in carrier recombination in the surface regions. This effect has been reported at both the undoped rear surface and phosphorous diffused emitter of PERC solar cells. This work investigates the influence of a range of surface conditions on the surface-related degradation (SRD) behaviour in PERC solar cells. It is shown that SRD is strongly affected by the doping profile of phosphorous emitters, the use of thin thermal oxides with SiNx:H dielectric passivation layers, the substrate material, and the configuration of the rear surface passivation. It finds that more lightly doped emitters result in more front side SRD, with its extent increasing with the introduction of the SiO2/SiNx:H surface passivation layers. Czochralski silicon (Cz-Si) wafers were observed to be significantly more susceptible to surface degradation than multi-crystalline silicon (mc-Si) wafers, which we attribute to less trapping of hydrogen in the bulk of those substrates. On the rear side of PERC cells, surface degradation was only observed in structures that incorporated the combination of SiO2/SiNx:H rear layers. No SRD was observed in the existing Al2O3/SiNx:H technology used in the industrial PERC cells studied. However, the results presented have implications for future commercial solar cell technologies, which are transitioning towards lightly doped emitters and commonly incorporate thermal oxides for surface passivation.

Light- and elevated-temperature-induced degradation (LeTID) in p-type multicrystalline silicon has a severe impact on the effective minority carrier lifetime of silicon and remains a crucial challenge for solar cell manufacturers. The precise cause of the degradation is yet to be confirmed; however, several approaches have been presented to reduce the extent of degradation. This paper presents insights on the impact of thermal budgets and cooling rates during post-firing illuminated anneals and their role in changing the lifetime and mitigating LeTID for thermal processes between 350 and 500 °C. We demonstrate that the thermal budget of these processes plays a crucial role in LeTID suppression and that the cooling rate only plays a role during short treatment durations (≤1 min). For the parameter space studied, we show that annealing for an appropriate time and temperature can both enhance the minority carrier lifetime and completely suppress the LeTID, with the injection-dependent Shockley–Read–Hall lifetime analysis indicating that the recombination activity of the LeTID defects in the bulk has been eliminated. Finally, this paper demonstrates a process that results in a stable lifetime after 800 h of conventional light-soaking at 75 °C.

Abstract In this work, we introduce a new approach to suppress light and elevated temperature-induced degradation (LeTID) by applying a pre-fire annealing step using rapid thermal processing (RTP) and discuss the impact of this process on the evolution of bulk and surface lifetime components. We demonstrate that pre-fire annealing at low temperatures and/or shorter holding times allows a significant amount of hydrogen to migrate into the bulk to passivate bulk defects as including grain boundaries and dislocation clusters, without causing surface deterioration. As such, the addition of the pre-fire annealing step results in larger improvements in bulk and surface lifetime than that of the control samples. These conditions also significantly suppress LeTID. Increasing pre-fire annealing temperature and duration is shown to completely mitigate LeTID. However, this process may cause surface deterioration, possibly due to the excessive effusion of hydrogen out of the dielectric layer. Injection-dependent lifetime analysis shows that at the most degraded state, the bulk lifetime of the pre-fire annealed samples (650 °C–1 min and 3 min) remains relatively higher (∼110 μs–∼120 μs) than that of the control sample (∼40 μs). Applying pre-fire annealing process at 700 °C on Cz-Si samples and testing the boron-oxygen (B-O) generation behavior suggest that these processes cause a reduction in the hydrogen concentration in the bulk, resulting in slower B-O regeneration rate and reduction of regeneration extent. This result also implies that the suppression of LeTID in mc-Si by applying a pre-fire thermal treatment is likely due to a reduction of hydrogen in the bulk, and this highlights that the proposed method of pre-fire annealing may be unsuitable for material such as p-type Cz silicon subjected to B-O related degradation.